| Currently,
Dr. Jae-Gon Kim and Prof. Marc Goetschalckx are studying an integrated
layout design methodology for physical layout design of manufacturing
and service systems. The three main issues in the facility layout
problem are determining shapes and locations of departments within
the floor (a block layout), locations of input and output (I/O) points,
and flow paths. Although these three issues are closely related
with each other, usually they are considered as isolated problems
for computationally tractable formulations. This motivated us
to develop an integrated layout design methodology to consider them
concurrently. The considered problem in this study is summarized
as follows.
Objective
To determine a block layout, locations of I/O points and flow paths
simultaneously minimizing the total transportation distance based
on the contour distance metric.
Assumptions
· Dimension of the floor where departments are placed is given.
· Departments have rectangular shapes but different sizes.
· Each department has one input point and one output point.
· Materials are moved along boundaries of the departments,
which are considered as candidates for flow path segments.
· Capacity of a flow path segment is finite and predetermined.
(Here, the capacity of a flow path segment is defined as a maximum
amount of material flows that go through the path segment in a unit
time period.)
· Spaces for material flow paths are not considered since areas
of departments are usually inflated to take into account the need
for flow paths.
· Cost of constructing material flow paths is not considered.
Constraints
· All departments should be placed within a given floor.
· Area of each department in a layout should be greater than
or equal to its given value.
· Aspect ratio of each department should be within a its given
range.
· Departments should not overlap with each other.
· I/O points should be placed on the boundaries of the departments.
In this study, we use the sequence-pair to represent relative positions
of departments in a block layout, which was originally used for the
physical design of VLSI layout. A linear programming model is
presented to generate a block layout from a sequence-pair and the
obtained block layout is transformed to a graph using a suggested
graph generation method. To determine locations of I/O points
and flow paths, heuristic methods are developed, respectively.
All these methods are embedded into a simulated annealing algorithm
to obtain the best layout design.
Although the above methodology is suggested for the (general) facility
layout problem, it may be applied to the warehouse layout design after
proper modifications since the warehouse layout problem is a special
case of the facility problem. The warehouse layout problem has
special characteristics in that a warehouse has a typical pattern
of layout structure due to the storage system and the layout decision
is highly interrelated with the warehouse operation processes and
policies such as order picking process/policy and storage process/policy.
These characteristics should be considered when generating a layout
design. We can consider shipping area, receiving areas, storage
area, forward picking area (if exist), sorting/consolidation area
(if exist) as departments of a warehouse and generate a block layout
with locations of docks, aisles and I/O points where pickers perform
various administrative and start-up tasks such as collecting a pick
device, obtaining a picking list etc. Usually, the storage area
consists of multiple pallet racks and crossing aisles and has the
largest area among the departments. Therefore, a layout within
the storage area itself is also very important. However, the
storage area layout has been generated separately with the warehouse
block layout to avoid complexities of the layout problem. Using
the suggested layout methodology, we could try to generate warehouse
block layout and storage layout simultaneously by splitting up the
storage area in smaller departments such as pallet racks and crossing
aisle.
Contact: marc.goetschalckx@isye.gatech.edu
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